Computer Organization – BE (PU) Question Paper 2010 | Semester: Spring

Download our Android App from Google Play Store and start reading Reference Notes Offline.

Computer OrganizationPokhara University | Old Question Paper
Bachelor of Engineering (BE)
Computer Organization | Level: Bachelor
Year: 2010 | Semester : Spring

Download Question Paper File
[ File Type: PDF | File Size: 214 KB | Download ]

Question Paper is Given Below:

Full Marks: 100 | Pass Marks: 45 | Time: 3 Hrs
Candidates are required to give their answers in their own words as far as practicable. The figures in the margin indicate full marks.

Attempt all the questions.

1. a. What are the factors that should be considered while designing a computer for performance? What do you mean by memory latency? And how it can be minimized? [8]
b. Write the Booth’s algorithm for multiplication of two negative numbers. Multiply the two numbers (-9)×(-13) using the algorithm. [7]

2. a. An instruction is stored at location 300 with its address field at location 301. The address field has the value 400. A processor register R1 contains the number 200. Evaluate the effective address if the addressing mode of instruction is: [10]

i. Direct
ii. Immediate
iii. Relative
iv. Index with R1 as index register

b. What is the difference between zero-address, one address and two address instructions? [5]

3. a. What do you mean by micro operation? Illustrate the micro operation involved in fetch, indirect and interrupt sub cycles of instruction cycle. [7]
b. What are the techniques for implementation of control unit? Explain how micro-programmed control is implemented in control unit along with suitable diagrams. [8]
OR
a. Briefly explain a hardwired implementation of a control unit with a necessary block diagram. [7]
b. What are the differences between horizontal and vertical microinstructions? List some common applications of microprogramming.[8]

4. a. Discuss DMA transfer with the help of block diagram. [7]
b. What is cache memory? Discuss the different mapping process while considering the organization of cache memory. [8]
OR
a. What are the reasons for not connecting peripherals directly to the system bus? Differentiate programmed I/O and interrupt I/O techniques to each other. [7]
b. Explain the need of memory hierarchy with the help of block diagram. What is the reason for not having one large memory unit for storing all information at one place? [8]

5. a. Explain the different types of scheduling algorithm. [7]
b. What do you mean by page and page frame? Explain the effect of dynamic portioning with an example.[8]

6. a. Explain Flynn’s classification of computer and differentiate between vector processing and array processing. [10]
b. What is arithmetic pipeline? Assume that pipeline has K = 6 segment and executes n = 100 tasks in sequence. Let the time taken to process a sub-operation in each segment is 35ns. Calculate the speed up ratio in pipeline. [5]

7. Write short notes on any two: [2 X 5]

a. RISC and CISC processor
b. RAID
c. Virtual Memory

Posted By : Hari Prasad Chaudhary | Comment RSS | Category : Bachelor Level, Bachelor of Engineering (BE), Pokhara University
Tag : ,

Post a Comment

Your email is never published nor shared. Required fields are marked *

*
*